The present invention relates to methods and apparatus for improving processing performance by controlling the latch points in, a processing system, such as a pipelined system.
In recent years, there has been an insatiable desire for faster computer processing data throughputs because cutting-edge computer applications involve real-time, multimedia functionality. Graphics applications are among those that place the highest demands on a processing system because they require such vast numbers of data accesses, data computations, and data manipulations in relatively short periods of time to achieve desirable visual results. These applications require extremely fast processing speeds, such as many thousands of megabits of data per second. While some processing systems employ a single processor to achieve fast processing speeds, others are implemented utilizing multi-processor architectures. In multi-processor systems, a plurality of sub-processors can operate in parallel (or at least in concert) to achieve desired processing results.
Semiconductor process technologies increase about every 18 months, with the current process being 90 nm. With the increase in process technology comes an increase in processing frequency and resultant increase in power dissipation. Although the increase in frequency improves processing performance, the increase in power dissipation is not desirable. Although, some have proposed decreasing the operating voltage to reduce the power dissipation, this has an undesirable complication: the leakage current increases.